1. Field of the Invention
The present invention relates to a liquid crystal display, and more particularly, to a liquid crystal display apparatus and a method of driving the same capable of lowering power consumption as well as production cost.
2. Discussion of the Related Art
Recently, the importance of display devices for providing visual information has increased. Cathode ray tubes are widely used at present but has a problem in that its weight and volume are large. Therefore, various types of flat display devices have been developed that overcome the problems of the cathode ray tube.
Examples of flat panel displays include liquid crystal display (LCD) panels, field emission displays (FED), plasma display panels (PDP) and an electro-luminescence (EL) display panels, and most of these devices are commercially available.
A liquid crystal display apparatus displays a picture represented in a video signal by controlling an electric field applied to a liquid crystal layer. The liquid crystal display apparatus has been used in portable computers such as notebook personal computers, office automation equipment, audio/video machinery and the like. The liquid crystal display apparatus is thin and has a low power consumption. Thus, it has replaced the cathode ray tube in many applications.
Further, the liquid crystal display apparatus with an active liquid crystal cell using a thin film transistor (hereinafter referred to as “TFT”) has the advantage that the picture quality is excellent and the power consumption is low. It has been rapidly developed into large, high definition displays due to recent productivity technology and research.
FIG. 1 shows a schematic plan view illustrating a typical liquid crystal display apparatus.
Referring to FIG. 1, the liquid crystal apparatus 1 includes: a liquid crystal display panel 2 provided with a thin film transistor (TFT) at a crossing of a data line and a gate line; a data driver 8 for providing data to the data line of the liquid crystal display panel 2; a gate driver 10 for providing a gate pulse to the gate line of the liquid crystal display panel 2; a back light unit 4 for irradiating light to the liquid crystal panel; a lamp driver 6 for driving a lamp in the back light unit 4; a timing controller 12 for controlling the data driver 8, the gate driver 10 and the lamp driver 6 of the liquid crystal display panel 2; and a power source generator 14 for supplying a power source required to the liquid crystal display panel 2 and the back light unit 4.
The liquid crystal display panel 2 has liquid crystal materials injected between two glass substrates. The TFT formed at the crossing of the data line and the gate line of the liquid crystal display panel 2 responds to a scan pulse from the gate driver 10 to apply the data in the data line to a liquid crystal cell. A source electrode of the TFT is connected to the data line, and a drain electrode is connected to the pixel electrode of the liquid crystal cell. Also, a gate electrode of the TFT is connected to the gate line.
The timing controller 12 realigns digital video data applied from a digital video card (not shown) according to red R, green G and blue B. The data RGB realigned by the timing controller 12 is applied to the data driver 8. Also, the timing controller 12 generates a data control signal (DCS) and a gate control signal (GCS) based upon a horizontal/vertical synchronization signal H, V and a clock signal (CLK) applied thereto, to thereby supply the signals to each of the data driver 8 and the gate driver 10. The data control signal (DCS) includes a dot clock signal Dclk, a source shift clock SSC, a source enable signal SOE and a polarity inversion signal POL. The gate control signal (GCS) includes a gate start pulse GSP, a gate shift clock GSC and a gate output enable GOE.
The data driver 8 samples the data in accordance with the data control signal DCS from the timing controller 12, latches the sampled data by one-line for every horizontal time (1H, 2H, . . . ), and then supplies the latched data to the data line. Moreover, the data driver 8 converts a digital pixel data R, G and B from the timing controller 12 into an analog pixel signal by using a gamma voltage GAM1 to GAM6 input from the power source generator 14, to thereby supply the analog pixel signal to the data line.
The gate driver 10 includes a shift register that sequentially generates a gate pulse in response to the gate start pulse GSP among the gate control signal GCS from the timing controller 12, and a level shifter that shifts a voltage of the gate pulse to a voltage level suitable for driving the liquid crystal cell. The gate driver 10 sequentially supplies a gate high voltage to the gate line in response to the gate control signal GCS.
The back light unit 4 includes a lamp (not shown) for irradiating light to the liquid crystal panel 2 and a lamp inverter for driving the lamp. The lamp inverter receives a lamp driving voltage Vinv from the power source generator 14 to drive the lamp.
The power source generator 14 supplies a common electrode voltage Vcom to the liquid crystal display panel 2, supplies the gamma voltage GMA1 to GMA6 to the data driver 8, and supplies the lamp driving voltage Vinv to the lamp inverter.
FIG. 2 is a perspective view illustrating the liquid crystal display panel shown in FIG. 1. The liquid crystal display panel 2 of the typical liquid crystal display apparatus 1 includes a color filter array substrate 20 and a TFT array substrate 30 that are combined with each other with a liquid crystal layer 15 positioned therebetween. The liquid crystal display panel 2 shown in FIG. 2 represents a portion of a full display.
In the color filter array substrate 20, a color filter 24 and a common electrode 26 are formed on a rear surface of an upper glass substrate 22. A polarizer 28 is attached on an upper surface of the glass substrate 22.
The color filter 24 includes the color filter layers of red R, green G and blue B colors that transmit light with a particular wavelength bandwidth to display colors. A black matrix (not shown) is formed between the adjacent color filters 24. The black matrix is formed between the color filters 24 of red R, green G and blue B to separate the color filters 24 from each other and to absorb the light incident from adjacent cells, to thereby prevent deterioration in contrast.
In the TFT array substrate 30, data lines 34 and gate lines 40 cross on the surface of a lower glass substrate 32. TFTs 38 are formed at the crossings of the data lines 34 and the gate lines 40. A pixel electrode 36 is formed at cell regions between each of the data lines 34 and each of the gate lines 40 across the entire surface of the lower glass substrate 32. Each of the TFTs 38 includes a gate electrode connected to the gate line 40, a source electrode connected to the gate line 34 and a drain electrode facing to the source electrode with a channel positioned therebetween. The TFT 38 is connected to the pixel electrode 36 via a contact hole passing through the drain electrode. The TFT 38 selectively provides a data signal from the data line 34 to the pixel electrode 36 in response to a gate pulse from the gate line 40. The TFT 38 opens a data path between the data line 34 and the pixel electrode 36 in response to the gate pulse from the gate line 40, to thereby drive the pixel electrode 36. A polarizer 42 is disposed on a rear surface of the TFT array substrate 30.
The pixel electrode 36 is positioned in a cell region partitioned by the data line 34 and the gate line 40 and is made of a transparent conductive material having a high light transmittance. The pixel electrode 36 generates a voltage difference along with a common electrode 26, which is formed on the upper glass substrate 22. A data signal inputted via the drain electrode produces the voltage difference. The liquid crystal layer 15 adjusts an amount of light passing through the TFT array substrate 30 in response to an applied electric field. The liquid crystal material of the liquid crystal layer 15 positioned between the lower glass substrate 32 and the upper glass substrate 22 rotates when an electric field is applied due to a dielectric anisotropy. Accordingly, the light that is enters the pixel electrode 36 from the light source is transmitted toward the upper glass substrate 22.
Polarizers 28 and 42 on the color filter array substrate 20 and the TFT array substrate 30 transmit light polarized in only one direction. When the liquid crystal material 15 is in a 90° TN mode, the polarization directions of the polarizers 28 and 42 are perpendicular each other. An alignment film (not shown) is formed on the facing surfaces of the color filter array substrate 20 and the TFT array substrate 30.
A process for fabricating the typical liquid crystal display panel 2 includes the following stops of substrate cleaning, substrate patterning, alignment film forming/rubbing, substrate assembling, liquid crystal material injecting, mounting, inspecting and repairing processes.
The substrate cleaning process removes the impurities remaining before/after patterning the upper glass substrate 22 and the lower glass substrate 32 using a detergent.
The substrate patterning process is divided into a patterning process of the color filer array substrate 20 and a patterning process of the TFT array substrate 30.
The color filter 24, the common electrode 26 and the black matrix (not shown) are formed on the upper glass substrate 22 of the color filter array substrate 20. Signal lines such as the data lines 34 and the gate lines 40 are formed on the lower glass substrate 32 of the TFT array substrate 30. Each of the TFTs 38 is formed at the crossing of each data line 34 and each gate line 40. The pixel electrodes 36 are formed in pixel regions between the gate lines 40 and the data lines 34.
The alignment film forming/rubbing process applies an alignment film to the color filter array substrate 20 and the TFT array substrate 30 and then rubs the alignment film.
The substrate assembling process and the liquid crystal material injecting process includes forming a sealant pattern on the color filter array substrate 20 or the TFT array substrate 30, discharging a gas filled inside of the liquid crystal display panel 2, injecting liquid crystal materials and a spacer through a liquid crystal injection hole, and sealing the liquid crystal injection hole while assembling the color filter array substrate 20 having the sealant pattern or the TFT array substrate 30 having the sealant pattern by using an assembling apparatus, to thereby fabricate the liquid crystal display panel 2.
In the mounting process of the liquid crystal panel, a tape carrier package (hereinafter referred to as a “TCP”) is connected to a pad part on the substrate. The TCP has integrated circuits mounted thereon such as a gate driver integrated circuit and a data driver integrated circuit. Such gate and data driver integrated circuits may be directly mounted on the substrate by using a chip on glass (hereinafter referred to as a “COG”) method as well as a TAB (Tape Automated Bonding) using the TCP as described above.
The inspecting process includes an electrical inspection performed after forming a variety of signal lines such as the data line 34 and the gate line 40 on the TFT array substrate 30 and the pixel electrode 36, and an electrical inspection and a visual inspection performed after the substrate assembling process and the liquid crystal material injection process. Specifically, the electrical inspection for the signal lines of the TFT array substrate 30 and the pixel electrode 36 before being performed the substrate assembling may increase the yield and may identify a defective substrate at an early stage that maybe repairable.
The repairing process repairs the substrate as determined by the inspection process. However, in the inspection process, defective substrates beyond repair are discarded.
FIG. 3 is a plan view representing a structure of a color pixel of the liquid crystal display panel shown in FIG. 2.
Referring to FIG. 3, in a liquid crystal display panel 2, an arrangement of color pixels 44 constituting a pixel 42 are designed by three color pixels R, G and B. A red color pixel 44R, a green color pixel 44G and a blue color pixel 44B are arranged on a horizontal line and red, green, and blue color pixels 44 are arranged in a stripe pattern in a vertical direction. One pixel 42 includes units of the red color pixel 44R, the green color pixel 44G, and the blue color pixel 44B formed on the horizontal line. Repeating the pixels 42 constitutes one pixel line, and the entire liquid crystal display apparatus constitutes by many pixel lines. Each of the color pixels 44 are driven by the TFTs 38.
FIG. 4A is a waveform representing a gate pulse waveform inputted to the liquid crystal panel shown in FIG. 3. FIG. 4B is a waveform representing an input signal and an output signal of a gate driver integrated circuit and a data driver integrated circuit of a typical liquid crystal display apparatus.
Placing a voltage on the color pixels of the liquid crystal display panel 2 will be described in detail in conjunction with FIGS. 4A to 4B.
If a gate shift clock GSC synchronized with a falling time of a data enable signal DE is generated, then a scan pulse having a gate high voltage Gout corresponding to one horizontal period 1H is sequentially supplied to the gate lines 40. A source start pulse SSP representing the beginning timing of a data sampling of a data driver circuit is synchronized at a rising time of the data enable signal DE, and a source out enable SOE signal representing the timing of outputting a data voltage from the data driver circuits is generated and delayed by a designated time from the falling time of the data enable DE signal for each one-horizontal period 1H. Each data voltage Sout is supplied to its corresponding data line 34 in synchronization with the source out enable SOE signal, and the data voltage is charged in the R, G, and B color pixels 44 via the TFT 38 that is turned-on by the data line 34 and the scan pulse. The voltage charged on the R, G, and B color pixels 44 drives the liquid crystal material to display a picture.
The data driver IC drives a plurality of data lines using a data voltage supplied to the color pixels 44 of the liquid crystal display apparatus 1. Therefore, the data driver IC consumes a large amount of power. As the liquid crystal display apparatus 1 tends to be made with increased resolution and a larger screen, the number of pixels increases accordingly. Further, as the number of pixels increases, the number of the data lines 34 to supply the data voltage to the color pixels 44 also increases. Accordingly, in the liquid crystal display apparatus 1, the number of the data driver ICs for driving the data line 34 increases pursuant to the increased number of data lines. Thus, there is a problem that production cost is increased.